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WinUAE 4.0.0 Beta6 [339][witek], 2018-04-29 15:55:08

[Source: http://eab.abime.net/showthread.php?t=91755&page=13]

Beta 5:

- Single scan line off by one fix in lagless vsync, frames+ mode now works correctly without static horizontal lines.
- Single slice lagless vsync had blank display (b4)
- Automatic scaling and some other scaling modes had very strange corrupted display in lagless vsync mode. Some small tearing is still possible if scaling is large enough.
- END+F9 lagless vsync debug mode now also adds small flickering markers that show where Amiga-side slices are positioned (Optimally they should be in the middle of large color bars). Switching screen modes does not anymore automatically disable debug colors.
- Reduced amount of data copied in lagless vsync if null filter or d3d shader is enabled.
- Overlay leds (b2) are now also supported in D3D9 mode.
- BPLCON1 delay logic fix when single scanline had at least one odd plane delay not equaling even plane delay and then one or more odd == even delays. (Very rare situation)
- Debugger fa command didnt find anything.
- Disassembler crashed if it disassembled FMOVECR instruction and statefile was loaded without enabled FPU.
- Switching from non-cycle exact to cycle exact mode stopped interrupts if only single INTENA interrupt was enabled.
- Moved CDTV SRAM from Advanced chipset to Expansions and added size selection.

Lagless vsync is now mostly complete. Tweaking to do, depending on feedback.
Toni Wilen is online now

Beta 6:

- Added DCE Typhoon MK2 (A1200 accelerator). ROM is almost identical to E-Matrix 530/1230. Identical SCSI driver, slightly modified RAM detection code.
- Fixed E-Matrix RAM selection.
- Fixed crash in lagless vsync mode if CPU speed was on the fly changed.
- Fixed directory harddrive uaehf.device bugs.
- Added optional extended precision (80 bit) host FPU mode. (Probably becomes default and replaces old when/if this gets good enough)

Extended precision FPU mode:
- Fully JIT FPU compatible.
- 32-bit and 64-bit compatible.
- Uses short assembly routines to directly execute x86 FPU instructions. (MSVC does not support long double, other UAE ports usually use long doubles by default)
- Basic floating point operations, square root, sin and cos are currently natively supported. Others use normal double precision C-library routines.
- Not yet fully working. Testing needed.


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